FISC

Supoperator

Since there are free bits in NOT, we can assign more sub operators as long as they take less than 3 registers. We choose the ASR (arithmetic shift right) operator.

Decoding suboperator

Remember that BNZ does not get processed by the ALU. ALU currently processes 3 operators. That means that the MUX in the ALU have an empty output (2^2 - 3 = 1) that we can assign our new suboperator to.

To prevent an extra MUX, we simply convert the operator/suboperator signal (4 bits) into a 2 bit MUX selector signal.