ISA
From Rice Wiki
Instruction set architecture (ISA)
Stack
Zero address architecture, where operands are on stack inside CPU.
It has the downside of being slow due to DRAM being slower than SRAM.
Accumulator
One operand is a register called accumulator, the other is from memory. Acc is always destination, so it is a one-address architecture.
The bottleneck is Acc, which everything goes through, making it slow.
CISC
Complex instruction set computer has many instructions and multiple addressing modes. This makes for fewer instructions per program but complex data path.
