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	<title>Princeton architecture - Revision history</title>
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	<updated>2026-04-09T16:53:17Z</updated>
	<subtitle>Revision history for this page on the wiki</subtitle>
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		<id>http://ricefriedegg.com:80/mediawiki/index.php?title=Princeton_architecture&amp;diff=893&amp;oldid=prev</id>
		<title>Rice: Created page with &quot;Category:Computer Architecture  \* This is self research from wikipedia  The &#039;&#039;&#039;Princeton architecture&#039;&#039;&#039; (aka. &#039;&#039;&#039;von Neumann architecture&#039;&#039;&#039;) is a CPU design that notably combine instruction and data memory into a single memory (unlike its counterpart, Harvard architecture).  = Advantages =  * Due to a unified memory, Princeton architecture is simpler * Simpler is cheaper * Because instruction and data cannot be accessed at the same time, Princeton is slower.&quot;</title>
		<link rel="alternate" type="text/html" href="http://ricefriedegg.com:80/mediawiki/index.php?title=Princeton_architecture&amp;diff=893&amp;oldid=prev"/>
		<updated>2024-06-07T06:30:19Z</updated>

		<summary type="html">&lt;p&gt;Created page with &amp;quot;&lt;a href=&quot;/mediawiki/index.php/Category:Computer_Architecture&quot; title=&quot;Category:Computer Architecture&quot;&gt;Category:Computer Architecture&lt;/a&gt;  \* This is self research from wikipedia  The &amp;#039;&amp;#039;&amp;#039;Princeton architecture&amp;#039;&amp;#039;&amp;#039; (aka. &amp;#039;&amp;#039;&amp;#039;von Neumann architecture&amp;#039;&amp;#039;&amp;#039;) is a CPU design that notably combine instruction and data memory into a single memory (unlike its counterpart, &lt;a href=&quot;/mediawiki/index.php/Harvard_architecture&quot; title=&quot;Harvard architecture&quot;&gt;Harvard architecture&lt;/a&gt;).  = Advantages =  * Due to a unified memory, Princeton architecture is simpler * Simpler is cheaper * Because instruction and data cannot be accessed at the same time, Princeton is slower.&amp;quot;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;[[Category:Computer Architecture]]&lt;br /&gt;
&lt;br /&gt;
\* This is self research from wikipedia&lt;br /&gt;
&lt;br /&gt;
The &amp;#039;&amp;#039;&amp;#039;Princeton architecture&amp;#039;&amp;#039;&amp;#039; (aka. &amp;#039;&amp;#039;&amp;#039;von Neumann architecture&amp;#039;&amp;#039;&amp;#039;) is a CPU design that notably combine instruction and data memory into a single memory (unlike its counterpart, [[Harvard architecture]]).&lt;br /&gt;
&lt;br /&gt;
= Advantages =&lt;br /&gt;
&lt;br /&gt;
* Due to a unified memory, Princeton architecture is simpler&lt;br /&gt;
* Simpler is cheaper&lt;br /&gt;
* Because instruction and data cannot be accessed at the same time, Princeton is slower.&lt;/div&gt;</summary>
		<author><name>Rice</name></author>
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