D latch: Revision history

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17 May 2024

6 May 2024

  • curprev 22:2222:22, 6 May 2024‎ Rice talk contribs‎ 772 bytes +772‎ Created page with "thumb|Figure 1. Schematic of a D latch The '''D latch''' is a direct upgrade from an SR latch. It has two inputs: (D)ata and (E)nabler. When ''E'' is activated, ''D'' is stored into the latch. When the enabler is deactivated, the circuit continues to latch the current value regardless of ''D''. = Clocked D latch = By connecting a clock to the enabler, you get a '''clocked D latch''' that is synchronized with the rest of the circuit. This is..." Tag: Visual edit
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