Memory array: Difference between revisions
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[[Category:Computer Architecture]] | |||
A '''memory array''' is an element for storing values. It takes in an N-bit address input and spits out an M-bit value output. | A '''memory array''' is an element for storing values. It takes in an N-bit address input and spits out an M-bit value output. | ||
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== Merging I/O == | == Merging I/O == | ||
Traditionally computers have an address bus and a data bus, and we sometimes write and sometimes read. Tri-state buffers can be used to do this. | Traditionally computers have an address bus and a data bus, and we sometimes write and sometimes read. Tri-state buffers can be used to do this. | ||
= Timing = | |||
Memory is the bottleneck of computing speed, almost certainly taking more than 1 clock cycle to run. An ideal memory is fast, cheap, and large capacity. The hierarchy goes from ''cache > main memory > virtual memory''. | |||
Check out [[Locality]] | |||
Latest revision as of 15:17, 3 June 2024
A memory array is an element for storing values. It takes in an N-bit address input and spits out an M-bit value output.
Depending on the use case (ROM or RAM), modifications are needed for the circuit, detailed on their respective page.
Specification
A memory array can store values, each value having M bits. A memory array is usually specified by the number of elements times the width of each value.
For example, if N = 10 and M = 12, we have a 1024x12 memory array.
Construction
Memory arrays are usually active lows since not gates are conveniently used for merging memory (see section below). Commercially, there may be an active high enabler.
Merging memory
You can make a bigger memory array with smaller memory arrays. Just enable the one you want according to the address.
A tri-state buffer can be used to control the output enable and write enable
Merging I/O
Traditionally computers have an address bus and a data bus, and we sometimes write and sometimes read. Tri-state buffers can be used to do this.
Timing
Memory is the bottleneck of computing speed, almost certainly taking more than 1 clock cycle to run. An ideal memory is fast, cheap, and large capacity. The hierarchy goes from cache > main memory > virtual memory.
Check out Locality
