ARM/Instruction format: Difference between revisions
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[[Category:Computer Architecture]] | [[Category:Computer Architecture]] | ||
The ARM instruction format is split into three types of instructions: | |||
* [[ARM/Data-processing instruction]] | |||
* [[ARM/Memory instruction]] | |||
* [[ARM/Branch instruction]] | |||
This page will go through the instruction format of each type. | |||
= Data-processing instruction format = | |||
Data-processing instructions take in the following operands | |||
* '''Rn:''' the first source register | |||
* '''Src2:''' the second source, which may be register or [[ARM/immediate|immediate]] | |||
* '''Rd:''' destination register | |||
and the following is used to control the instruction | |||
* '''cond:''' specifies [[ARM/conditional execution|conditional execution]] | |||
* '''op:''' the opcode, which is 0b00 for data processing instructions | |||
* '''funct:''' the function to perform | |||
= Src2 = | = Src2 = | ||
Revision as of 19:22, 28 May 2024
The ARM instruction format is split into three types of instructions:
This page will go through the instruction format of each type.
Data-processing instruction format
Data-processing instructions take in the following operands
- Rn: the first source register
- Src2: the second source, which may be register or immediate
- Rd: destination register
and the following is used to control the instruction
- cond: specifies conditional execution
- op: the opcode, which is 0b00 for data processing instructions
- funct: the function to perform
Src2
Allows for immediate (a constant with rotation), register (with a static shift amount), or register-shifted register.
The immediate is rotated imm8 ROR rot*2, limiting precision but allowing for a greater range of values.
