Memory timing: Difference between revisions
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The '''tag''' is used to detect misses. | The '''tag''' is used to detect misses. | ||
'''Compulsory misses''' cannot be prevented. | '''Compulsory misses''' cannot be prevented. '''Conflict misses''' happen when there is already another loaded thing in the cache blocking a new item. | ||
Revision as of 15:40, 3 June 2024
Keep recently accessed data in higher levels of memory hierarchy (i.e. use better memory).
Hit or miss
Hit is when data is found in that level of memory hierarchy. Miss is the complement.
Average memory access time
![{\displaystyle AMAT=t_{cache}+MR_{cache}[t_{MM}+MR_{MM}(t_{VM})]}](https://wikimedia.org/api/rest_v1/media/math/render/svg/42c7c179c9d8d238656b239b095696ce178563df)
Note that if memory is not in main, it must be in virtual
Cache
Fastest, ideally predict the future to put needed stuff into the cache using spatial and temporal locality.
A cache is organized into S sets, each address mapping to exactly one set.
- Direct mapped: 1 block per set
- N-way set associative: N blocks per set
- Fully associative: all cache blocks in 1 set
The tag is used to detect misses.
Compulsory misses cannot be prevented. Conflict misses happen when there is already another loaded thing in the cache blocking a new item.
