Virtual memory: Difference between revisions
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A '''translation lookaside buffer (TLB)''' is a small cache of recent translations that reduces memory accesses. Page tables are high temporal locality so fully associative. | A '''translation lookaside buffer (TLB)''' is a small cache of recent translations that reduces memory accesses. Page tables are high temporal locality so fully associative. | ||
Each process has a page tables that only maps to one section of physical address. The OS prevents accesses from one process to another. | Each process has a page tables that only maps to one section of physical address. The OS prevents accesses from one process to another. When processes switch, we either store a process id or to just flush the page tables. | ||
[[Category:Computer Architecture]] | [[Category:Computer Architecture]] | ||
Revision as of 15:50, 5 June 2024
Virtual memory gives the illusion of a bigger memory. Each programs use the same virtual addresses.
Physical memory acts as a cache for virtual memory. A page table can be used to translate virtual to physical address.
Most accesses hits physical memory, but some doesn't.
A translation lookaside buffer (TLB) is a small cache of recent translations that reduces memory accesses. Page tables are high temporal locality so fully associative.
Each process has a page tables that only maps to one section of physical address. The OS prevents accesses from one process to another. When processes switch, we either store a process id or to just flush the page tables.
